China Deploys Massive RISC-V Server in Commercial Cloud

If the U.S. government intends to curb China’s adoption of emerging RISC-V architecture to develop homegrown chips, it may be getting late.

Last month, China’s Shandong University deployed a server cluster with RISC-V CPUs. The system has a total of 3,072 cores, with 48 nodes of 64-bit RISC-V CPUs.

This is the first commercial implementation of a RISC-V cluster in the cloud, claimed David Chen, director of ecosystem at Alibaba, during a presentation at the RISC-V Summit in Santa Clara, California.

The system is for Shandong University’s teaching and research purposes but is also available for cloud computing instances, Chen said in response to a question from HPCwire for more details on the system. He added that the system was finished and delivered in September and October.

Top U.S. cloud providers, including Google, Amazon, and Microsoft, do not yet offer commercial virtual machines based on RISC-V CPUs in the cloud. The companies largely offer V.M.s based on x86 or ARM architectures.

The U.S. is trying to strangle China’s capability to build high-performance systems by denying access to the latest chip technologies. China is now cutting its reliance on proprietary Western chip technologies and advancing domestic chip development around RISC-V.

The RISC-V instruction set architecture is free to license and is an alternative to x86 architecture, which is used by Intel and AMD, and ARM architecture, which is licensed by companies such as Amazon, Apple, Samsung, and Qualcomm.

China’s Plan for RISC-V

China has a comprehensive plan to develop domestic chips around RISC-V. This year, China’s Ministry of Science and Technology funded RISC-V chip development efforts, and many universities and science labs are also focusing on chip development around RISC-V.

The Chinese Academy of Sciences (CAS) is developing an advanced RISC-V chip called XiangShan-v3 in collaboration with top Chinese companies, including Alibaba, Tencent, and ZTE. CAS hopes the chip will match the performance of ARM’s Neoverse-N2 server CPU design, which was announced in 2021.

The RISC-V system delivered to Shandong University system uses Sophgo’s SG2042 chip, which has a clock speed of 2GHz and 64 M.B. of cache. The system supports the PCIe Gen 4 interface.

Sophgo released its RISC-V chip earlier this year, and Alibaba worked with the company to bring Linux O.S. to the chip. Software support for RISC-V is still weak despite growing adoption, and Chen called on developers globally to support 20,000 cloud computing packages to RISC-V.

Resistance to RISC-V Regulation

China’s RISC-V server should catch the attention of U.S. lawmakers, who are concerned about China’s use of open technology to advance their domestic chip agenda.

Lawmakers in the House have called on President Joe Biden to restrict U.S. companies from working with Chinese companies on RISC-V technologies. The current export semiconductor export restrictions, which mainly cover GPUs and AI chips, do not have provisions for RISC-V technologies.

But the idea of restricting RISC-V – whether by countries or corporate entities — was met with strong resistance by attendees at the RISC-V Summit.

China was not directly mentioned in the major keynotes, but the concept of collaboration without borders was a theme strongly supported by participants.

“We’ve encountered many challenges as a globe, a world, and an interconnected society. We have overcome economics. We have overcome pandemics. We have overcome the trials and tribulations that you might find with vendor lock-in,” said Calista Redmond, CEO of RISC-V International, responsible for developing and advancing the RISC-V standard.

Advances in RISC-V are based on a community working to solve problems and advancing technologies. Healthy collaboration and competition move the state-of-the-art forward, Redmond said.

“I want to just take this head on — right global standards have underpinned the most important technologies that we have seen in the course of history, whether it is USB or Ethernet, web protocols like HTTPS. These are the things that level the playing field, that allow us to innovate,” Redmond said.

Some RISC-V Summit participants compared the government intervention in RISC-V development to intervening in the development of Linux.

Some technology experts have been more direct in their opposition to the government controlling the development of RISC-V, which would have the opposite effect of strengthening proprietary technologies.

“The request is facially misguided; any restrictions would only serve to reduce American participation in an important emerging technology while bolstering ARM’s position as an incumbent near-monopoly provider of embedded CPUs,” wrote hacker popularly known as Bunnie in a blog entry this week.

In an open letter to Biden, Bunnie wrote: “Any restrictions placed on U.S. persons sharing RISC-V technology would only serve to diminish America’s role as a technological leader. Over-broad restrictions could deprive educators of a popular tool used to teach students about computers on American campuses, for fear of also accidentally teaching to an embargoed entity.”

How China Built a Chip Plan Around RISC-V

China opted to build a national chip plan around RISC-V after a failed effort starting in 2012 to merge all kinds of chip architectures — x86, MIPS, PowerPC, Alpha, and SPARC – into a unified design, Yungang Bao, deputy director of information and communications technologies at the Chinese Academy of Sciences (CAS), said during a presentation in June this year.

The CAS – which is on the U.S. entity list — in 2019 launched a countrywide initiative to promote RISC-V in the academic and startup communities. An effort called “One Chip One Student” (OSOC), which teaches RISC-V chip design to undergraduate students, has attracted 4,000 participants.

Chinese RISC-V companies also established the China RISC-V Alliance in 2018, intending to build out a full open-source chip ecosystem by 2030.

Impact on Software Development

The idea of government intervention to limit RISC-V innovation could also impact software development.

Google, in late October, formally acknowledged it was boosting its effort to port Android to RISC-V. Alibaba, working with Google, has made most of its contributions to port RISC-V to Android.

Starting in 2020, engineers at Alibaba put in a massive effort to expand the core RISC-V functionality of the AOSP (Android Open Source Project) and conducted reliability testing, Chen said.

Chinese developers are also prolific contributors to mainstream Linux support for RISC-V technologies. Canonical has an Ubuntu build for RISC-V processors.

On The Show Floor

Alibaba was the only major Chinese chip vendor on the RISC-V Summit show floor, showing systems with its chips and talking about its processors, such as the XuanTie C910 chip.

Government funding is helping Chinese vendors advance swiftly with RISC-V, while some US-based RISC-V companies have struggled lately.

SiFive recently laid off 20% of its staff; however, another RISC-V company, Andes Technology, had a recruiter present at its stall, and in its booth was advertising about a dozen open engineering positions.